The present invention relates to two-way shift register that is capable of two-way shifting of an input signal even in the case where an amplitude of an input signal is smaller than that of a driving voltage, so as to be advantageously used in, for instance, a driving circuit in an image display device. Further, the present invention also relates to an image display device using the same.
Shift registers are widely used in, for instance, data signal driving circuits and scanning signal driving circuits in image display devices, so as to take timings for sampling data signals from image signals, and to produce a scanning signal to be applied to each signal line. Furthermore, in image display devices in which display sections or imaging sections are provided so as to be turned around, mirror images obtained by vertically or horizontally inverting images need be displayed depending on directions of the display section or the imaging section. Therefore two-way shift registers are used as the foregoing shift registers in the foregoing devices. In this case, upon switching of the shift direction, a direction for scanning images is inverted. Consequently, mirror images can be displayed without recording image signals in pixels.
On the other hand, consumed electric power of an electronic circuit increases proportionally to a product of a frequency, a load capacitance, and a square of a voltage. Therefore, in a circuit connected with an image display device, for instance, a circuit for producing image signals for an image display device, or in an image display device, a driving voltage tends to be set further lower so that the power consumption should be suppressed.
In circuits using polycrystalline silicon thin film transistors so as to ensure a large display area, for instance, in pixels, in data signal line driving circuits, or in scanning signal line driving circuits, differences in threshold voltages between substrates or in one and the same substrate are occasionally as much as several volts. Therefore, it cannot be considered that sufficient decrease in the driving voltage has been achieved. However, the driving voltage in a circuit using monocrystalline silicon transistors such as the foregoing image signal generating circuit are often set to 5V, or 3.3V, or lower than that. For this reason, in the case where input signals lower than the driving voltage of the shift register are applied, the shift register is provided with a level shifter for boosting the voltage of the input signal.
More specifically, in the case where a start signal SP with an amplitude of about 5V is applied to a conventional shift register 101 as described above, as shown in FIG. 9, for example, a level shifter 103 boosts the start signal SP to a level of a driving voltage (15V) of the shift register 101. An output of the level shifter 103 is applied to both a flip-flop F1 on one end of a shift register section 102 and a flip-flop Fn on the other end of the same. The shift register section 102 shifts the start signal SP in a direction corresponding to a switching signal L/R, in synchronization with a clock signal CK.
In the foregoing conventional shift register 101, however, the start signal SP is transferred to the flip-flops F1 and Fn after being level-shifted, and therefore, the following problem arises: as the distance between the flip-flops F1 and Fn increases, the transmission distance increases, and hence, the consumed power increases.
More specifically, as the transmission distance increases, the capacitance of the transmission-use signal line increases, thereby requiring a greater driving power of the level shifter 103, and hence, causing the consumed electric power to increase. Furthermore, in the case where the driving power of the level shifter 103 is in sufficient as in the case where the foregoing driving circuit including the level shifter 103 is formed using polycrystalline silicon thin film transistors, a buffer 104 is required to be provided between the level shifter 103 the flip-flop Fn, as shown with dotted lines in the figure, so that a non-distorted waveform is transferred. Consequently, further more electric power is consumed.
Recently, the number of stages in the shift register section 102 increases more and more, since a higher-resolution image display device with a larger display screen is in demand. Therefore, a two-way shift register and an image display device that does consume rather less electric power even when the distance between the flip-flops F1 and Fn on the both ends increases have been demanded earnestly.
An object of the present invention is to provide a shift register that is capable of two-way shifting, that normally operates even in the case where an input signal has a small amplitude, and that consumes less electric power, as well as to provide an image display device using such a shift register.
To achieve the foregoing object, a two-way shift register of the present invention is characterized by including (1) a shift register section for switching an input side to an output side or vice versa in accordance with a switching signal, and for transferring an input signal through a plurality of flip-flops from an end that has become an input-side end to an end that has become an output-side end, and (2) level shifters for boosting a signal and for outputting the same to the shift register section, the level shifters being provided adjacent to both the ends of the shift register section, respectively.
According to the foregoing arrangement, in the shift register section, the input signal is transferred through the plural flip-flops from the input side to the output side. The input side and the output side of the shift register section are switched to each other in accordance with the switching signal.
Incidentally, in a conventional two-way shift register, a shift register section is composed of a plurality of flip-flops, and a single level shifter for boosting a signal is provided adjacent to one end of the foregoing shift register section. Therefore, in the case where the other end becomes the input side according to a switching signal, the signal boosted by the level shifter is first transferred to the other end before being inputted to the shift register section.
The foregoing conventional arrangement however has the following problem.
Namely, recently an image display device of higher resolution has been demanded, that requires more and more flip-flops, thereby resulting in that a distance between both ends of a shift register section tends to increase. In this case, in the foregoing conventional arrangement in which the signal boosted by a level shifter at one end of the shift register is first transferred to the other end and then inputted, the level shifter requires a greater driving power as the transfer distance increases, and consequently the power consumption increases.
Furthermore, in the case where the driving power of the level shifter is not sufficient, it is necessary to provide a buffer on a route of transfer of the boosted signal, thereby causing further more electric power to be consumed.
Conversely, with the foregoing arrangement of the present invention, the level shifters for boosting a signal and for outputting the same to the shift register section are provided adjacent to both ends of the shift register section, respectively. Therefore, no matter which end of the shift register section becomes the input-side end according to the switching signal, the signal boosted by the level shifter adjacent to the input-side end can be outputted to the shift register section.
Thus, according to the present invention, the boosted signal need not be transferred from one end of the shift register to the other end thereof. Therefore, the consumed electric power does not increase, in the case where the distance between the ends of the shift register increases. Further, since to provide a buffer as in the conventional case is unnecessary, the foregoing arrangement of the present invention ensures to achieve a decrease in consumed power.
An image display device of the present invention is characterized by including (1) a plurality of pixels formed at intersections of a plurality of data signal lines and a plurality of scanning signal lines, (2) a data signal line driving circuit for consecutively driving the data signal lines, and (3) a scanning signal line driving circuit for consecutively driving the scanning signal lines, wherein at least one of the data signal line driving circuit and the scanning signal line driving circuit includes a shift register circuit, the shift register circuit including (i) a shift register section for switching an input side to an output side or vice versa in accordance with a switching signal, and for transferring an input signal through a plurality of flip-flops from an end that has become an input-side end to an end that has become an output-side end, and (ii) level shifters for boosting a signal and for outputting the same to the shift register, the level shifters being provided adjacent to both the ends of the shift register, respectively.
With the foregoing arrangement, in at least one of the two-way shift registers of the data signal line driving circuit and the scanning signal line driving circuit, the level shifters for boosting a signal and for outputting the same to the shift register section are provided adjacent to both the ends of the shift register section, respectively. Therefore, the boosted signal need not be transferred from one end of the shift register to the other end thereof. Consequently, the consumed electric power does not increase, in the case where the distance between the ends of the shift register increases. Further, since to provide a buffer as in the conventional case is unnecessary, the foregoing arrangement of the present invention ensures to achieve a decrease in consumed power.
For a fuller understanding of the nature and advantages of the invention, reference should be made to the ensuing detailed description taken in conjunction with the accompanying drawings.